ENN4363D

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Ordering number ENN4363D
LC6527N/F/L, 6528N/F/L
LC6527N/F/L, 6528N/F/L
Single Chip 4-Bit Microcontroller Small-Scale Control-Oriented Applications
LC6527N LC6528N belong single-chip 4-bit microcontroller LC6500 series fabicated using CMOS process technology suited small-scale control-oriented applications. Their basic asrchitecture instruction same. Application areas include standard logic circuits applications where number controls small. LC6527N LC6528N have relation LC6527C LC6528C version replaced version, version part function different). version added voltage version. following show careful difference version when replace version with version. version version Operating Temperature -30°C +70°C -40°C +85°C 1-pin oscillation exist exist 400kHz MURATA C1=C2=330pF C1=C2=220pF R=2.2k 800kHz MURATA C1=C2=220pF C1=C2=100pF R=2.2k KYOCERA C1=C2=220pF C1=C2=110pF 1MHz MURATA C1=C2=220pF C1=C2=100pF R=2.2k (Note) suffix recommend oscillation changed version version, characteristic change.
Features
CMOS technology low-power operation (with instruction-controlled standby function) LC6527N 8bits, 4bits LC6528N 0.5K 8bits, 4bits Instruction kinds selectable from instructions common LC6500 series Wide operating voltage range from 2.2V 6.0V version) Instruction cycle time 0.92µs version)
SANYO products described contained herein have specifications that handle applications that require extremely high levels reliability, such life-support systems, aircraft's control systems, other applications whose failure reasonably expected result serious physical and/or material damage. Consult with your SANYO representative nearest before using SANYO products described contained herein such applications. SANYO assumes responsibility equipment failures that result from using products values that exceed, even momentarily, rated values (such maximum ratings, operating condition ranges, other parameters) listed products specifications SANYO products described contained herein.
Oscillation Constant
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
Ver. 1.01A 72294 13001 (IM) YATSU No.4363-1/28
LC6527N/F/L, 6528N/F/L
Flexible port Number ports ports pins max. ports Input output common Input output voltage max. (open drain type) Output current 20mA max. (sink current) (LED direct drivable) Option selectable your intended system Open drain output, pull-up resistor Single-bit select ports Output level reset mode 4-bit select level port Stack level levels Timer 4-bit prescaler+8-bit programmable timer Clock oscillation option selectable your intended system Oscillator option :2-pin oscillation version) 2-pin ceramic resonator oscillation, 1-pin external clock input version) Predivider option predivider, predivider, predivider version)
Function Table
Item Memory Instruction LC6527N 1024 bits (27N) bits (28N) bits (27N) bits (28N) LC6527F 1024 bits (27F) bits (28F) bits (27F) bits (28F) LC6527L 1024 bits (27L) bits (28L) bits (27L) bits (28L)
Instruction Oscillation Characteristic Input output port On-chip function
4-bit prescaler+8-bit timer 4-bit prescaler+8-bit timer 4-bit prescaler+8-bit timer Standby available Standby available Standby available HALT instruction HALT instruction HALT instruction Number ports max. max. max. voltage max. max. max. Output current 10mA typ. 20mA max. 10mA typ. 20mA max. 10mA typ. 20mA max. circuit configuration Open drain (N-channel) pull-up resistor-provided output selectable bit. Output level reset mode level selectable port port (port only) Minimum cycle time 2.77µs (VDD4V) 0.92µs (VDD4.5V) 3.84µs (VDD2.2V) 6.0µs (VDD3V) Supply voltage Current dissipation 2.5mA typ. typ. 2.5mA typ. Resonator (850kHz, 400kHz typ.) (400kHz typ.) ceramic (400k, 800k,1MHz, ceramic 4MHz ceramic (400k, 800k,1MHz, 4MHz) 4MHz) predivider option Other Package DIP18, MFP18* DIP18, MFP18* DIP18, MFP18* (Note) Information resonator oscillation circuit constants will presented soon recommended circuit determined. *MFP18 under development
Timer Stack level Standby function
No.4363-2/28
LC6527N/F/L, 6528N/F/L Assignment
LC6527N LC6528N
OSC1 TEST OSC2
Package Dimentions
unit 3007B
24.0
7.62
(1.84)
3.85max (3.25)
2.54
SANYO DIP18(300mil)
ILC00139
Common unit 3095 immerse package solder tank when mounting substrate.
0.51min
12.6
0.35
1.27
1.22
SANYO MFP-18(300mil)
(Note) package reference figure without description rank. Please inquire formal package.
0.625
1.8max
0.15
6.35
No.4363-3/28
0.25
LC6527N/F/L, 6528N/F/L Name
OSC1, OSC2 ceramic resonator Reset Input output common port Input output common port Input output common port Input output common port TEST Test
System Block Diagram
LC6527N LC6528N
PA0-3
PC0-3
PD0-3
OSC2 Note
OSC1
Note TEST
Port
Port
Port
Port
(Note STACK1 STACK2 STACK3 Buffer STACK4 I.DEC (Note
SYSTEM
ILC00140
Note1. OSC2 selected mask option. Note2. LC6527N 1024 bytes words LC6528N bytes words
No.4363-4/28
LC6527N/F/L, 6528N/F/L Development Support Tools
following available support program development LC6527, LC6528. User's Manual "LC6527, LC6528 User's Manual" 24-6016 ('86.10.1.) Note "LC6523 Series User's Manual" No.16A-7015 No.16-9064. Development Tool Manual EVA-800 EVA-850 system, refer "EVA-800. LC6527, LC6528 Development Tool Manual". Development Tools program evaluation Piggy back (LC65PG23 23T27 pin-to-pin conversion socket piggy back LC65PG23 EVA-86000 system program development development. program evaluation microcontroller built-in EPROM (LC65E29)+conversion substrate (29T027)
Note. notes program evaluation, fail refer `4-3. Notes when evaluating programs'in "LC6527, LC6528 User's Manual".
EVA-410 EVA-420
EPROM (2732, 2764)
EPROM LC6596
CN-1 FAP-40-03#2
FAP-20-03#2 CN-3 FAS-20-03B
NFP-30A-0112 (34A)
Piggy back LC65PG23
45cm
2.54mm pitch flat cable 2.54mm pitch DIP18
Conversion board 23T27
FGP-20-01#2 removed the10 used DIP18.
ILC00141
ILC00142
Fig.1 Evaluation terget board (EVA-TB6523C 28C)
Fig. Program evaluation
No.4363-5/28
LC6527N/F/L, 6528N/F/L
program development (EVA-800 EVA-850 system) MS-DOS host system (Note Cross assembler.MS-DOS base cross assembler <LC65S.EXE> Host control program Evaluation chip LC6596 Emulator EVA-800 EVA-850 emulator evaluation boards EVA800-TB6527
Appearance Development Support System
Host processor control program LC65S.EXE cross assembler
MS-DOS personal computer
EVA-800 EVA-850 emulator (note
CN1,
LC6596 CABLE9 Evaluation chip board EVA800-TB6527
FS-20 SAP20 User's application board Remove pin, DIP18
ILC00143
(Note MS-DOS Trademark Microsoft Corporation (Note EVA-800, EVA-850 general term emulator. suffix B,.) added EVA-800 EVA-850 they improved newer version. EVA-800 EVA-850 with suffix added.
No.4363-6/28
LC6527N/F/L, 6528N/F/L Description
name Pins Function Power supply OSC1 Input externally connecting ceramic resonator system clock generation. 1-pin external clock input, OSC2 used port PH0. 2-pin OSC, 2-pin ceramic resonator OSC, OSC2 used OSC2. Input port output 4-bit input instruction) 4-bit output instruction) Single-bit decision (BP, instruction) Single-bit reset (SPB, instruction) Standby controlled PA3. must free from chattering during HALT instruction execution cycle. Input port output same (Note) Option permits output reset mode "L". (Note) standby control function provided. Option 1-pin external clock input 2-pin 2-pin ceramic resonator Predivider option predivider predivider predivider Open drain type output With pull-up resistor Specified Reset Mode
output (Output transistor OFF)
Open drain type output
OSC2
TEST
Input port output Same Input port Same output Same (Note) Single-bit configuration 2-pin OSC, this used OSC2 pin, providing function port. (Note) standby control function provided Input System reset input power-up reset, connected externally. reset restart, level applied clock cycles more. Input test Normally connected
With pull-up resistor Output reset mode Output reset mode Specified Specified group bits Same Same Same
output output (Option-selectable)
No.4363-7/28
LC6527N/F/L, 6528N/F/L Oscillator circuit option
Option Name External clock Circuit
OSC1
ILC00102
Conditions, etc. OSC2 used port PH0. OSC2 used OSC2, providing function port.
2-pin
Cext
OSC1
OSC2 Rext
ILC00144
Ceramic resonator
Ceramic resonator
OSC1
OSC2
ILC00145
OSC2 used OSC2, providing function port.
Predivider Option
Option Name predivider Circuit
circuit
fOSC
ILC00105
predivider
circuit
fOSC
predivider
ILC00106
predivider
circuit
Timing generator
fOSC
Conditions, etc. Applicable options. frequency, external clock exceed 1444kHz. (LC6527N, 6528N) frequency, external clock exceed 4330kHz. (LC6527F, 6528F) frequency, external clock exceed 1040kHz. (LC6527L, 6528L) Applicable only options external clock, ceramic resonator OSC. frequency, external clock exceed 4330kHz.
Timing generator
fOSC
predivider
ILC00107
Note option predivider option summarized below. Full care must exercised.
Timing generator
fOSC
Applicable only options external clock, ceramic resonator OSC. frequency, external clock exceed 4330kHz.
No.4363-8/28
LC6527N/F/L, 6528N/F/L
Table OSC, predivider Option LC6527N 28N, LC6527N, LC6528N Circuit Configuration Frequency Predivider Option Range Remarks (Cycle time) Ceramic resonator 400kHz (10µs) Unusable with predivider 800kHz (5µs) (15µs) (20µs) 1MHz (4µs) (12µs) (16µs) 4kHz (3µs) Unusable with predivider (4µs) 1-pin external clock 200k 677kHz 6µs) 600k 2000kHz 6µs) 800k 2667kHz 6µs) 200k 1444kHz 2.77µs) 600k 4330kHz 2.77µs) 800k 4330kHz 3.70µs) External clock 2-pin Same above circuit 2-pin Used with predivider, recommended constants. used with other than recommended constants, frequency, predivider option, range must same 1-pin external clock. External clock input ceramic oscillation circuit cannot driven external clock. ceramic oscillation circuit drive circuit with external clock, select external clock option 2-pin option.
LC6527F, LC6528F Circuit Configuration
Predivider Option Range Remarks (Cycle time) Ceramic resonator 4MHz (1µs) 1-pin external clock 200k 4330kHz 0.92µs) External clock input ceramic oscillation circuit cannot driven external clock. ceramic oscillation circuit drive circuit with external clock, select external clock option.
Frequency
No.4363-9/28
LC6527N/F/L, 6528N/F/L
LC6527L, LC6528L Circuit Configuration Ceramic resonator Frequency 400kHz 800kHz Predivider Option (Cycle time) (10µs) (5µs) (15µs) (20µs) (4µs) (12µs) (16µs) (4µs) 3.84µs) 3.84µs) 3.84µs) Range Remarks Unusable with predivider
1MHz
4kHz 1-pin external clock 200k 1040kHz 600k 3120kHz 800k 4160kHz Same above
Unusable with predivider
Used with predivider, recommended constants. used with other than recommended constants, frequency, predivider option, range must same 1-pin external clock. External clock input ceramic oscillation circuit cannot driven external clock. ceramic oscillation circuit drive circuit with external clock, select external clock option 2-pin option.
External clock 2-pin circuit 2-pin
Option ports Output Level Reset Mode
input output common ports either following output levels selected group bits during reset option. Option Name Conditions, etc. Output reset mode "H"level bits ports Output reset mode "L"level bits ports
Option port Output Configuration
each input output common port, either following output configurations selected option. Option Name Circuit Conditions, etc. Open drain output Unapplicable port OSC2 when 2-pin ceramic resonator selected.
ILC00236
Output with pull-up resistor
ILC00237
No.4363-10/28
LC6527N/F/L, 6528N/F/L
LC6527N, LC6528N Absolute Maximum Ratings Ta=25°C, VSS=0V Parameter Symbol Pins Maximum supply voltage Output voltage OSC2 Input voltage Input output voltage Peak output current Average output current VI(1) VI(2) VIO(1) VIO(2) IOA(1) IOA(2) Allowable power max(1) dissipation max(2) OSC1 (*1) TEST, Port type Port type port port over period 100ms Total current (*2) Total current (*2) Ta=-40 +85°C (DIP package) Ta=-40 +85°C (MFP package)*
Conditions
Limits -0.3 +7.0V Allowable voltage generated -0.3 VDD+0.3 -0.3 VDD+0.3 -0.3 -0.3 VDD+0.3
unit
Operating Topg temperature Storage Tstg +125 temperature development. immerse package solder tank when mounting substrate. Allowable Operating Conditions Ta=-40°C +85°C, VSS= VDD=3.0 6.0V Ratings Parameter Symbol Pins Conditions Operating supply voltage Standby RAM, register hold supply voltage (*3) "H"-level input VIH(1) Port type Output 0.7VDD voltage (except VIH(2) Port type Output 0.7VDD (except VIH(3) type Output 0.8VDD VIH(4) type Output 0.8VDD VIH(5) 0.8VDD VIH(6) OSC1 External clock mode 0.8VDD "L"-level input VIL(1) Port Output VDD=4 voltage VIL(2) Port Output VDD=3 VIL(3) OSC1 External clock mode VDD=4 VIL(4) OSC1 External clock mode VDD=3 VIL(5) TEST VDD=4 VIL(6) TEST VDD=3 VIL(7) VDD=4 VIL(8) VDD=3
+13.5 +13.5 0.3VDD 0.25VDD 0.25VDD 0.2VDD 0.3VDD 0.25VDD 0.25VDD 0.2VDD
unit
No.4363-11/28
LC6527N/F/L, 6528N/F/L
Parameter Operating frequency (cycle time) Symbol (Tcyc) Pins Conditions When predivider option selected, clock must exceed 4.33MHz. VDD=4 (20) (20) Ratings 1444 (2.77) (6.0) unit (µs) (µs)
External clock conditions Frequency Pulse width Rise Fall time
text
OSC1
textH, textL OSC1 textR, textF OSC1
Fig.1. When clock exceeds VDD=4 1.444MHz, predivider VDD=4 option selected. VDD=4
4330 2667
Oscillation guaranty constants 2-pin Cext oscillation Cext Rext Rext Ceramic resonator
OSC1, OSC2 OSC1, OSC2 OSC1, OSC2 OSC1, OSC2
Fig.2 Fig.2 Fig.2 Fig.2 Fig.3
VDD=3 VDD=4 VDD=3 VDD=4
220±5% 220±5% 12±1% 4.7±1% Table
Electrical Characteristics Ta=-40°C +85°C, VSS= VDD=3.0V 6.0V Parameter "H"-level input current Symbol IIH(1) Pins Conditions Ratings +5.0 unit
IIH(2) "L"-level input current IIL(1) IIL(2) IIL(3) IIL(4) "H"-level output VOH(1) voltage VOH(2) "L"-level output VOL(1) voltage VOL(2) Hysteresis voltage VHIS
Port type Output (including leak current Tr.) VIN=±13.5V OSC1 External clock mode, VIN=VDD Port type Output -1.0 VIN=VSS Port type Output -1.3 -0.35 VIN=VSS VIN=VSS OSC1 External clock mode, -1.0 VIN=VSS Port type IOH=-50µA VDD-1.2 VDD=4.0V 6.0V Port type IOH=-10µA VDD-0.5 Port IOL=10mA VDD=4.0V 6.0V Port IOL=1.8mA, each port less RES, OSC1 0.1VDD schmitt type(*4)
+1.0
No.4363-12/28
LC6527N/F/L, 6528N/F/L
Parameter Current dissipation 2-pin oscillation Symbol Pins Conditions Output operating, Port=VDD IDDOP(1) IDDOP(2) IDDOP(3) IDDOP(4) IDDOP(5) IDDOP(6) IDDOP(7) Fig.2 fosc=850kHz (TYP) VDD=4 Fig.2 fosc=400kHz (TYP) Fig.3 4MHz, predivider VDD=4 Fig.3 4MHz, predivider VDD=4 Fig.3 400kHz Fig.3 800kHz VDD=4 200kHz 667kHz, predivider 600kHz 2000kHz, predivider 800kHz 2667kHz, predivider 200kHz 1444kHz, predivider 600kHz 4330kHz, predivider 800kHz 4330kHz, predivider VDD=4 Output VDD=6V Port=VDD VDD=3V Ratings unit
Ceramic resonator oscillation
External clock
IDDOP(8)
Standby mode Oscillation characteristics Ceramic Frequency
IDDst
0.05 0.025
fCFOSC (*5)
OSC1, OSC2 OSC1, OSC2 OSC1, OSC2 OSC1, OSC2
Stable time
tCFS
2-pin oscillation Frequency
fMOSC
OSC1, OSC2
OSC1, OSC2
Fig.3 fo=400kHz Fig.3 fo=800kHz, VDD=4 Fig.3 fo=1MHz, VDD=4 Fig.3 fo=4MHz, predivider predivider, VDD=4 Fig.4 fo=400kHz Fig.4 fo=800kHz, 1MHz, 4MHz, predivider, predivider VDD=4 Fig.2 Cext=220pF±5% Fig.2 Rext=4.7k±1% VDD=4 Fig.2 Cext=220pF±5% Fig.2 Rext=12k±1% VDD=3
3840
1000 4000
1040 4160
1117
No.4363-13/28
LC6527N/F/L, 6528N/F/L
Ratings
Parameter
Symbol
Pins
Conditions
unit
Pull-up resistance port pull-up resistance External reset characteristics Reset time tRST capacitance
Port type
VDD=5V
Fig.5 f=1MHz Other than pins tested, VIN=VSS
(*1) When oscillated internally under oscillating conditions Fig.3, oscillation amplitude generated allowable. (*2) Average over period 100ms. (*3) Operating supply voltage must held until standby mode entered after execution HALT instruction. must free from chattering during HALT instruction execution cycle. (*4) OSC1 schmitt-triggered when 2-pin oscillation option external clock oscillation option been selected. (*5) fCFOSC oscillation frequency. There tolerance approximately between center frequency ceramic resonator mode nominal value presented ceramic resonator supplier. details, refer specification ceramic resonator.
No.4363-14/28
LC6527N/F/L, 6528N/F/L
OSC1
(OSC2)
External clock
OPEN
0.8VDD
0.2VDD(VDD=3-4V) 0.25VDD(VDD=4-6V) textF textL textR textH
text
Fig. External Clock Input Waveform
ILC00146
*External clock used selecting 2-pin option 1-pin external clock option, cannot used ceramic resonator oscillation.
OSC1
OSC2
OSC1
OSC2
Rext Cext
Ceramic resonator
Fig. 2-pin Oscillation Circuit
ILC00088
Fig. Ceramic Resonator Oscillation Circuit
ILC00147
Lower limit operating
Unstabilized period tCFS
Stabilized
Fig. Oscillation Stabilizing Period
ILC00148
No.4363-15/28
LC6527N/F/L, 6528N/F/L
Table Constants Guaranteed Ceramic Resonator 4MHz (Murata) 33pF±10% CSA4.00MG 33pF±10% CST4.00MGW (built-in 4MHz (Kyocera) 33pF±10% KBR4.0MSA 33pF±10% KBR4.0MKS (built-in 1MHz (Murata) 100pF±10% CSB1000J 100pF±10% 1MHz (Kyocera) 100pF±10% KBR1000F 100pF±10% 800kHz (Murata) 100pF±10% CSB800J 100pF±10% 800kHz (Kyocera) 100pF±10% KBR800F 100pF±10% 400kHz (Murata) 220pF±10% CSB400P 220pF±10% 400kHz (Kyocera) 330pF±10% KBR400BK 330pF±10%
CRES(=0.1µF)
Fig. Reset Circuit
ILC00240
(Note) When rise time power supply reset time becomes 10ms 100ms CRES=0.1µF. rise time power supply long, value CRES must increased that reset time becomes 10ms more.
No.4363-16/28
LC6527N/F/L, 6528N/F/L
Oscillation Characteristics LC6527N, LC6528N Fig. shows oscillation characteristics LC6527N, LC6528N. variation range frequency LC6527N, LC6528N, following guaranteed external constants only shown below. VDD=3.0V 6.0V, Ta=-40°C +85°C External constants Cext=220pF Rext=12k 304kHzfMOSC580kHz VDD=4.0V 6.0V, Ta=-40°C +85°C Cext=220pF Rext=4.7k 646kHzfMOSC1117kHz
other constants than specified above used, range Rext=3k 20k, Cext=150pF 390pF must observed. (See Fig.6.)
(*6) oscillation frequency VDD=5.0V, Ta=+25°C must range 350kHz 750kHz. (*7) oscillation frequency VDD=4.0V 6.0V, Ta=-40°C +85°C VDD=3.0V 6.0V, Ta=-40°C 85°C must within operation clock frequency range.
MOSC-Rext
MOSC[kHz]
1000
These characteristic curves given reference only without guarantee.
VDD=5(V) Ta=25(°C)
Rext
ILC00149
Fig. Oscillation Frequency Data (Typ.)
No.4363-17/28
LC6527N/F/L, 6528N/F/L
LC6527F, LC6528F Absolute Maximum Ratings Ta=25°C, VSS=0V Parameter Symbol Pins Maximum supply voltage Output voltage OSC2 Input voltage Output voltage Peak output current Average output current VI(1) VI(2) VIO(1) VIO(2) IOA(1) IOA(2) Allowable power max(1) dissipation max(2) OSC1 (*1) TEST, Port type Port type port port over period 100ms Total current (*2) Total current (*2) Ta=-40 +85°C (DIP package) Ta=-40 +85°C (MFP package)*
Conditions
Limits -0.3 +7.0V Allowable voltage ganerated -0.3 VDD+0.3 -0.3 VDD+0.3 -0.3 -0.3 VDD+0.3
unit
Operating Topg temperature Storage Tstg +125 temperature development. immerse package solder tank when mounting substrate. Allowable Operating Conditions Ta=-40°C +85°C, VSS= VDD=4.5 6.0V Ratings unit Parameter Symbol Pins Conditions Operating supply voltage Standby RAM, register hold (*3) supply voltage "H"-level input VIH(1) Port type Output 0.7VDD +13.5 voltage (except VIH(2) Port type Output 0.7VDD (except VIH(3) type Output 0.8VDD +13.5 VIH(4) type Output 0.8VDD VIH(5) 0.8VDD VIH(6) OSC1 External clock mode 0.8VDD "L"-level input VIL(1) Port Output 0.3VDD voltage VIL(2) OSC1 External clock mode 0.25VDD VIL(3) TEST 0.3VDD VIL(4) 0.25VDD
No.4363-18/28
LC6527N/F/L, 6528N/F/L
Parameter Operating frequency (Cycle time) External clock conditions Frequency Pulse width Rise Fall time Oscillation guaranteed constants ceramic resonator Symbol (Tcyc) Pins Conditions (20) Ratings 4330 (0.92) unit (µs)
text OSC1 textH, textL OSC1 textR, textF OSC1
Fig.1
4330
Fig.2
Table
Electrical Characteristics Ta=-40°C +85°C, VSS= VDD=4.5V 6.0V Parameter "H"-level input current Symbol IIH(1) Pins Conditions Ratings +5.0 unit
IIH(2) "L"-level input current IIL(1) IIL(2) IIL(3) IIL(4) "H"-level output voltage "L"-level output voltage Hysteresis voltage VOH(1) VOH(2) VOL(1) VOL(2) VHIS
Port type Output (including leak current Tr.) VIN=±13.5V OSC1 External clock mode, VIN=VDD Port type Output -1.0 VIN=VSS Port type Output -1.3 -0.35 VIN=VSS VIN=VSS OSC1 External clock mode, -1.0 VIN=VSS Port type IOH=-50µA VDD-1.2 Port type IOH=-10µA VDD-0.5 Port IOL=10mA Port IOL=1.8mA, each port less RES, OSC1 0.1VDD schmitt type(*4)
+1.0
No.4363-19/28
LC6527N/F/L, 6528N/F/L
Parameter Current dissipation Ceramic resonator External clock Symbol Pins Conditions Ratings unit
IDDOP(1) IDDOP(2)
Fig.2 4MHz 200kHz 4330kHz Output Tr.OFF Operating mode Port=VDD Output VDD=6V Port=VDD VDD=3V
Standby mode Oscillation characteristics Ceramic Frequency Stable time Pull-up resistance port pull-up resistance External reset characteristics Reset time capacitance
IDDst
0.05 0.025
fCFOSC tCFS
OSC1, OSC2
Fig.2 fo=4MHz (*5) Fig.3 fo=4MHz
3840
4000
4160
Port type
VDD=5V
tRST
f=1MHz, other than pins tested, VIN=VSS
Fig.4
(*1) When oscillated internally under oscillating conditions Fig.2, oscillation amplitude generated allowable. (*2) Average over period 100ms. (*3) Operating supply voltage must held until standby mode entered after execution HALT instruction. must free from chattering during HALT instruction execution cycle. (*4) OSC1 schmitt-triggered when external clock oscillation option been selected. (*5) fCFOSC Oscillatable frequency.
No.4363-20/28
LC6527N/F/L, 6528N/F/L
OSC1
(OSC2)
External clock
OPEN 0.8VDD
0.25VDD textF textL textR textH
text
Fig. External Clock Input Waveform
ILC00150
Lower limit operating
OSC1 OSC2
Ceramic resonator
Unstabilized period tCFS
Stabilized
Fig. Ceramic Resonator Circuit
ILC00151
Fig. Stabilizing Period
ILC00152
Table Constants Guaranteed Ceramic Resonator 4MHz (Murarta) 33pF±10% CSA4.00MG 33pF±10% CST4.00MGW (built-in 4MHz (Kyocera) 33pF±10% KBR4.0MSA 33pF±10% KBR4.0MKS (built-in
CRES(=0.1µF)
Fig. Reset Circuit
ILC00153
(Note) When rise time power supply reset time becomes 10ms 100ms CRES=0.1µF. rise time power supply long, value CRES must increased that reset time becomes 10ms more.
No.4363-21/28
LC6527N/F/L, 6528N/F/L
LC6527L, LC6528L Absolute Maximum Ratings Ta=25°C, VSS=0V Parameter Symbol Pins Maximum supply voltage Output voltage OSC2 Input voltage Input output voltage Peak output current Average output current VI(1) VI(2) VIO(1) VIO(2) IOA(1) IOA(2) Allowable power max(1) dissipation max(2) OSC1 (*1) TEST, Port type Port type port port over period 100ms Total current (*2) Total current (*2) Ta=-40 +85°C (DIP package) Ta=-40 +85°C (MFP package)*
Conditions -0.3 +7.0
Limits
unit
Allowable votage ganerated -0.3 VDD+0.3 -0.3 VDD+0.3 -0.3 -0.3 VDD+0.3
Operating Topg temperature +125 Storage Tstg temperature development. immerse package solder tank when mounting substrate. Allowable Operating Conditions Ta=-40°C 85°C, VSS= VDD=2.2 6.0V Parameter Operating supply voltage Standby supply voltage "H"-level input voltage Symbol VIH(1) VIH(2) VIH(3) VIH(4) VIH(5) VIH(6) VIL(1) VIL(2) VIL(3) VIL(4) Port type (except Port type (except type type OSC1 Port OSC1 TEST RAM, register hold (*3) Output Output Output Output External clock Output External clock Pins Conditions 0.7VDD 0.7VDD 0.8VDD 0.8VDD 0.8VDD 0.8VDD Ratings +13.5 +13.5 0.2VDD 0.15VDD 0.2VDD 0.15VDD unit
"L"-level input voltage
No.4363-22/28
LC6527N/F/L, 6528N/F/L
Parameter Operating frequency (cycle time) External clock conditions Frequency Pulse width Rise fall time Oscillation guaranteed constants 2-pin oscillation Ceramic oscillation Symbol (Tcyc) Pins Conditions When predivider option selected, clock must exceed 4.16MHz. (20) Ratings 1040 (3.84) unit (µs)
text OSC1 textH, textL OSC1 textR, textF OSC1
Fig.1 When clock exceeds 1.040MHz, predivider option selected.
4160
Cext Rext
OSC1, OSC2
Fig.2 Fig.3
220±5% 12±1% Table
Electrical Characteristics Ta=-40°C +85°C, VSS= VDD=2.2V 6.0V Parameter "H"-level input current Symbol IIH(1) Pins Conditions Ratings +5.0 unit
IIH(2) "L"-level input current IIL(1) IIL(2) IIL(3) IIL(4) "H"-level output voltage "L"-level output VOL(1) voltage VOL(2) Hysteresis voltage VHIS
Port type Output (including leak current Tr.) VIN=±13.5V OSC1 External clock mode, VIN=VDD Port type Output VIN=VSS Port type Output VIN=VSS VIN=VSS OSC1 External clock mode, VIN=VSS Port type IOH=-10µA Port Port RES, OSC1 schmitt type(*4) IOL=3mA IOL=1mA, each port less
+1.0 -1.0 -1.3 -1.0 VDD-0.5 0.1VDD -0.35
No.4363-23/28
LC6527N/F/L, 6528N/F/L
Parameter Current dissipation 2-pin Ceramic Symbol Pins Conditions Output operating, Port=VDD Fig.2 fOSC=400kHz (TYP) Fig.3 4MHz, predivider Fig.3 4MHz, predivider VDD=2.2V Fig.3 400kHz Fig.3 800kHz 200kHz 667kHz, predivider 600kHz 2000kHz, predivider 800kHz 2667kHz, predivider Output VDD=6V Port=VDD VDD=2.2V Ratings unit
IDDOP(1) IDDOP(2) IDDOP(3) IDDOP(4) IDDOP(5) IDDOP(6)
External clock
Standby mode Oscillation characteristics Ceramic Frequency
IDDst
0.05 0.025
fCFOSC (*5)
OSC1, OSC2 OSC1, OSC2 OSC1, OSC2 OSC1, OSC2
Stable time
tCFS
2-pin Frequency Pull-up resistance port pull-up resistance External reset characteristics Reset time capacitance
fMOSC
OSC1, OSC2
Fig.3 fo=400kHz Fig.3 fo=800kHz Fig.3 fo=1MHz Fig.3 fo=4MHz predivider Fig.4 fo=400kHz Fig.4 fo=800kHz, 1MHz, 4MHz, predivider Fig.2 Cext=220pF±5% Fig.2 Rext=12k±1%
3840
1000 4000
1040 4160
Port type
VDD=5V
tRST
f=1MHz Other than pins tested, VIN=VSS
Fig.5.
(*1) When oscillated internally under oscillating conditions Fig.3, oscillation amplitude generated allowable. (*2) Average over period 100ms. (*3) Operating supply voltage must held until standby mode entered after execution HALT instruction. must free from chattering during HALT instruction execution cycle. (*4) OSC1 schmitt-triggered when 2-pin oscillation option external clock oscillation option been selected. (*5) fCFOSC Oscillatable frequency. There tolerance approximately between center frequency ceramic resonator mode nominal value presented ceramic resonator supplier. details, refer specification ceramic resonator.
No.4363-24/28
LC6527N/F/L, 6528N/F/L
OSC1
(OSC2)
External clock
OPEN
0.8VDD
0.15VDD textF textL textR textH
text
Fig. External Clock Input Waveform
ILC00154
*External clock used selecting 2-pin option 1-pin external clock option, cannot used ceramic resonator oscillation.
OSC1
OSC2
OSC1
OSC2
Rext Cext
Ceramic resonator
Fig. 2-pin Oscillation Circuit
ILC00088
Fig. Ceramic Resonator Oscillation Circuit
ILC00147
Lower limit operating
Stabilized Unstabilized period tCFS
Fig. Oscillation Stabilizing Period
ILC00148
No.4363-25/28
LC6527N/F/L, 6528N/F/L
Table Constants Guaranteed Ceramic Resonator 4MHz (Murata) 33pF±10% CSA4.00MGU 33pF±10% CST4.00MGWU (built-in 1MHz (Murata) 100pF±10% CSB1000J 100pF±10% 1MHz (Kyocera) 100pF±10% KBR1000F 100pF±10% 800kHz (Murata) 100pF±10% CSB800J 100pF±10% 800kHz (Kyocera) 100pF±10% KBR800F 100pF±10% 400kHz (Murata) 220pF±10% CSB400P 220pF±10% 400kHz (Kyocera) 330pF±10% KBR400BK 330pF±10%
CRES(=0.1µF)
Fig. Reset Circuit
ILC00240
(Note) When rise time power supply reset time becomes 10ms 100ms CRES=0.1µF. rise time power supply long, value CRES must increased that reset time becomes 10ms more.
No.4363-26/28
LC6527N/F/L, 6528N/F/L
Oscillation Characteristic LC6527L, LC6528L Fig. shows oscillation characteristic LC6527L, 6528L. variation range frequency LC6527L, 6528L, following guaranteed external constants only shown below. VDD=2.2V 6.0V, Ta=-40°C +85°C External constants Cext=220pF Rext=12k 281kHzfMOSC580kHz
other constants than specified above used, range Rext=3k 20k, Cext=150pF 390pF must observed. (See Fig.6.)
(*6) oscillation frequency VDD=5.0V, Ta=+25°C must range 350kHz 500kHz. (*7) oscillation frequency VDD=2.2V 6.0V, Ta=-40°C +85°C must within operation clock frequency range.
MOSC-Rext
MOSC[kHz]
1000
These characteristic curves given reference only without guarantee.
VDD=5(V) Ta=25(°C)
Rext
ILC00149
Fig. Oscillation Frequency Data (Typ.)
No.4363-27/28
LC6527N/F/L, 6528N/F/L
Specifications SANYO products described contained herein stipulate performance, characteristics, functions described products independent state, guarantees performance, characteristics, functions described products mounted customer's products equipment. verify symptoms states that cannot evaluated independent device, customer should always evaluate test devices mounted customer's products equipment. SANYO Electric Co., Ltd. strives supply high-quality high-reliability products. However, semiconductor products fail with some probability. possible that these probabilistic failures could give rise accidents events that could endanger human lives, that could give rise smoke fire, that could cause damage other property. When designing equipment, adopt safety measures that these kinds accidents events cannot occur. Such measures include limited protective circuits error prevention circuits safe design, redundant design, structural design. event that SANYO products(including technical data,services) described contained herein controlled under applicable local export control laws regulations, such products must expor without obtaining expor license from authorities concerned accordance with above law. part this publication reproduced transmitted form means, electronic mechanical, including photocopying recording, information storage retrieval system, otherwise, without prior written permission SANYO Electric Co., Ltd. information described contained herein subject change without notice product/technology improvement, etc. When designing equipment, refer "Delivery Specification" SANYO product that intend use. Information (including circuit diagrams circuit parameters) herein example only guaranteed volume production. SANYO believes information herein accurate reliable, guarantees made implied regarding infringements intellectual property rights other rights third parties. This catalog provides information January, 2001. Specifications information herein subject change without notice.
No.4363-28/28

ENN4363D

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